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ADC 6021 Specifikace Strana 90

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MYXPM6021*
Revision 1.1 - 10/21/14
*Advanced information. Subject to change without notice.
90
MYXPM6021*
Form #: CSI-D-685 Document 011
Interrupt Name Register Source
First-Level
Interrupt
Related
Status Bit Description
SYS1ALRT0 THRMIRQ0 Thermal Control
Unit
THRM Set by the thermal state machine when
a system thermistor 1 temperature
alert0 occurs
SYS2ALRT0 THRMIRQ0 Thermal Control
Unit
THRM Set by the thermal state machine when
a system thermistor 2 temperature
alert0 occurs
PMICALRT0 THRMIRQ0 Thermal Control
Unit
THRM Set by the thermal state machine when
a PMIC die temperature alert0 occurs
SYS0ALRT1 THRMIRQ0 Thermal Control
Unit
THRM Set by the thermal state machine when
a system thermistor 0 temperature
alert1 occurs
SYS1ALRT1 THRMIRQ0 Thermal Control
Unit
THRM Set by the thermal state machine when
a system thermistor 1 temperature
alert1 occurs
SYS2ALRT1 THRMIRQ0 Thermal Control
Unit
THRM Set by the thermal state machine when
a system thermistor 2 temperature
alert1 occurs
PMICALRT1 THRMIRQ0 Thermal Control
Unit
THRM Set by the thermal state machine when
a PMIC die temperature alert1 occurs
SYS0CRIT THRMIRQ1 Thermal Control
Unit
THRM Set by the thermal state machine when
a system thermistor 0 critical
temperature event occurs
SYS1CRIT THRMIRQ1 Thermal Control
Unit
THRM Set by the thermal state machine when
a system thermistor 1 critical
temperature event occurs
SYS2CRIT THRMIRQ1 Thermal Control
Unit
THRM Set by the thermal state machine when
a system thermistor 2 critical
temperature event occurs
PMICCRIT THRMIRQ1 Thermal Control
Unit
THRM Set by the thermal state machine when
a PMIC die critical temperature event
occurs
BAT0ALRT0 THRMIRQ2 Thermal Control
Unit
THRM Set by the thermal state machine when
a battery thermistor 0 temperature
alert0 occurs
BAT1ALRT0 THRMIRQ2 Thermal Control
Unit
THRM Set by the thermal state machine when
a battery thermistor 1 temperature
alert0 occurs
BAT0ALRT1 THRMIRQ2 Thermal Control
Unit
THRM Set by the thermal state machine when
a battery thermistor 0 temperature
alert1 occurs
Table56:SecondLevelInterrupt(continued)
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